It has been over two years since my last blog, a lot has happened SDR wise, we introduced the ANAN-200D which comprises of the Orion SDR co-developed by myself and Joe, K5SO. It would be pertinent to point out that Orion is based on the work of the OpenHPSDR community.
The ANAN-200D adds a sampler for Warren's (NR0V) award winning PureSignal Algorithm, it was quite a challenge to redesign the PA board to minimize Tx/Rx cross-talk! maybe a topic for another blog post.
The Mic/Bias/PTT selection is under software control and the 10 Mhz reference selection is automated on the Orion board.
The Orion PCB is again an eight layer affair with improved Rx Front end ground plane, layout of the components are very similar to the Angelia PCB but there are quite a few changes in the inner layers, there is a header for a third ADC and Joe's firmware supports it too,
The FPGA is a monster with over 150K LEs and 8 general purpose PLLs, I chose the largest available in the Cyclone IV series, the first prototype was based on the Cyclone V but we reverted back to the Cyclone IV due to severe limitations in the PLL functionality on the V.
I have designed and tested the 3rd ADC daughter-card which has not been implemented yet in the ANAN-200D.
Expect more posts on a regular basis, thanks for visiting,
Abhi
The ANAN-200D adds a sampler for Warren's (NR0V) award winning PureSignal Algorithm, it was quite a challenge to redesign the PA board to minimize Tx/Rx cross-talk! maybe a topic for another blog post.
The Mic/Bias/PTT selection is under software control and the 10 Mhz reference selection is automated on the Orion board.
The Orion PCB is again an eight layer affair with improved Rx Front end ground plane, layout of the components are very similar to the Angelia PCB but there are quite a few changes in the inner layers, there is a header for a third ADC and Joe's firmware supports it too,
The FPGA is a monster with over 150K LEs and 8 general purpose PLLs, I chose the largest available in the Cyclone IV series, the first prototype was based on the Cyclone V but we reverted back to the Cyclone IV due to severe limitations in the PLL functionality on the V.
I have designed and tested the 3rd ADC daughter-card which has not been implemented yet in the ANAN-200D.
Expect more posts on a regular basis, thanks for visiting,
Abhi